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POWER MANAGEMENT Description
The SC1454 contains two ultra low dropout voltage regulators (ULDOs). It operates from an input voltage range of 2.25V to 6.5V, and a wide variety of output voltage options are available. One ULDO has a fixed output, and the other is either fixed (SETA pin grounded) or adjustable using external resistors. Each ULDO has an independent enable pin.
Dual 150mA Ultra Low Dropout, Low Noise Regulator
Features
Up to 150mA per regulator output Low quiescent current Low dropout voltage Stable operation with ceramic caps Very low 50VRMS output noise Wide selection of output voltages Tight load and line regulation Current and thermal limiting Reverse input polarity protection <1.5uA off-mode current Logic controlled enable
SC1454
Designed specifically for battery operated systems, the devices utilize CMOS technology to require very low operating currents (typically 130A with both outputs supplying 150mA). In addition, the dropout voltage is typically 155mV at 150mA, helping to prolong battery life further. The devices are designed to provide 400mA of peak current for applications which require high initial inrush current. They have been designed to be used with low ESR ceramic capacitors to save cost and PCB area. The SC1454 is available with a wide variety of voltage options as standard. It comes in the tiny 8 lead MSOP surface mount package.
u u u u u u u The SC1454 has a bypass pin to enable the user to u capacitively decouple the bandgap reference for very low u u output noise (50VRMS typically). u u u u u u u
Applications
Cellular telephones Palmtop/Laptop computers Battery-powered equipment Bar code scanners SMPS post regulator/dc to dc modules High efficiency linear power supplies
Typical Application Circuit
U1 SC1454DIMS OUTPUT A: 3.0V OUTPUT B: 3.0V 1 2 3 4 C1 1uF C2 1uF OUTA OUTB GND SETA IN ENA BYP ENB 8 7 6 5 C3 10nF ENABLE OUTPUT B C4 1uF VIN ENABLE OUTPUT A
U1 OUTPUT A: 2.5V OUTPUT B: 2.8V R1 100k 1 2 3 4
SC1454CIMS IN ENA BYP ENB 8 7 6 5 ENABLE OUTPUT B VIN ENABLE OUTPUT A
OUTA OUTB GND SETA
R2 100k C1 1uF C2 1uF C3 10nF C4 1uF
Revision 1, November 2000
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SC1454
POWER MANAGEMENT Absolute Maximum Ratings
Parameter Input Supply Voltage Enable Input Voltage Operati ng Ambi ent Temperature Range Operati ng Juncti on Temperature Range Storage Temperature Range Thermal Impedance Juncti on to Ambi ent(1) Thermal Impedance Juncti on to Ambi ent(2) Thermal Impedance Juncti on to C ase ESD Rati ng (Human Body Model) Sy mbol VIN V EN TA TJ TSTG q JA q JA q JC ESD Maximum -5 to +7 -5 to +VIN -40 to +85 -40 to +125 -60 to +150 206 95 39 2 U nits V V C C C C /W C /W C /W kV
NOTES: (1) Minimum pad size. (2) 1 square inch of FR-4, double sided, 1oz. minimum copper weight.
Electrical Characteristics
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter IN Input Supply Voltage Qui escent C urrent
Sy mbol
C onditions
Min
Ty p
Max
U nits
VIN IQ VENA = 0V, VENB = VIN, IOUTB = 150mA or VENB = 0V, VENA = VIN, IOUTA = 150mA VENA = VENB = VIN, IOUTA = IOUTB = 150mA
2.25 100
6.50 150 200 130 200 250
V A
A
VIN = 6.5V, VENA = VENB = 0V (OFF)
0.2
1.0 1.5
A
OU TA, OU TB Output Voltage(1) VOUT IOUT = 1mA 0mA IOUT 150mA, VOUT + 1V VIN 5.5V Li ne Regulati on(1) REG(LINE) VOUT + 1V VIN 5.5V, IOUT = 1mA -1% -2% 2.5 VOUT +1% +2% 10 12 Load Regulati on(1) REG(LOAD) 0.1mA IOUT 150mA -5 -20 -30
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V
mV
mV
SC1454
POWER MANAGEMENT Electrical Characteristics
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter OU TA, OU TB (C ont.) D ropout Voltage(1)(2)
Sy mbol
C onditions
Min
Ty p
Max
U nits
VD
IOUT = 1mA IOUT = 50mA
1 52 70 90
mV
IOUT = 150mA
155
210 270
C urrent Li mi t Ri pple Rejecti on Output Voltage Noi se
ILIM PSRR en f = 120Hz, C BYP = 10nF f = 10Hz to 100kHz, IOUT =50mA, C BYP = 10nF, C OUT = 2.2F f = 10Hz to 1MHz, IOUT =50mA, C BYP = 10nF, C OUT = 2.2F
400 60 50 55
mA dB VRMS
E N A, E N B Enable Input Threshold VIH VIL Enable Input Bi as C urrent(3) B YP Start-Up Ri se Ti me SETA Sense/Select Threshold SETA Reference Voltage VTH VSETA VIN = 2.5V, IOUT = 1mA 0mA IOUT 150mA, 2.5V VIN 5.5V SETA Input Leakage C urrent(3) Ov er Temperature Protection Hi gh Tri p Level Hysteresi s THI THYST 150 20 C C ISETA VSETA = 1.3V 20 -1% -2% 0.015 40 1.250 80 +1% +2% 50 nA mV V tr C BYP = 10nF 1.25 ms IEN 0V VENA/B VIN -0.5 1.6 0.4 0.5 A V
NOTES: (1) Low duty cycle pulse testing with Kelvin connections required. (2) Defined as the input to output differential at which the output drops 100mV below the value measured at a differential of 1V. Not measurable on 1.5V and 1.8V outputs due to minimum VIN constraints. (3) Guaranteed by design.
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SC1454
POWER MANAGEMENT Pin Configuration
(Top View)
Voltage Options
Replace X in the part number (SC1454XIMS) by the letter shown below for the corresponding voltage option:
X A B VOUTA (V) 1.8 2.5 2.8 3.0 3.3 3.0 3.0 3.0 3.3 3.3 VOUTB (V) 1.8 2.5 2.8 3.0 3.3 2.5 1.8 2.8 2.5 2.8
MSOP-8
C D E
Ordering Information
Part N umbers SC 1454XIMSTR(1)(2) P ackag e MSOP-8
F G H J K
Notes: (1) Where X denotes voltage options - see Voltage Options table. (2) Only available in tape and reel packaging. A reel contains 2500 devices.
Pin Descriptions
Pin # 1 2 3 4 Pin N ame OUTA OUTB GND SETA Regulator A output. Regulator B output. Ground pi n. C onnecti ng thi s pi n to ground results i n the i nternally preset value for VOUT. C onnecti ng to an external resi stor di vi der changes VOUTA to:
R1 V OUTA = 1 . 250 * 1 + R2
Pin Function
5 6 7 8
ENB BYP ENA IN
Acti ve hi gh enable pi n for output B. C MOS compati ble i nput. C onnect to IN i f not bei ng used. Bypass pi n for bandgap reference. C onnect a 10nF capaci tor, C BYP, between thi s pi n and ground for low noi se operati on. Acti ve hi gh enable pi n for output A. C MOS compati ble i nput. C onnect to IN i f not bei ng used. Input pi n for both regulators.
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SC1454
POWER MANAGEMENT Block Diagram
Marking Information
# = Voltage option (Example: 454F) yyww = Datecode (Example: 0008) XXXX = Lot number (Example: E90101-1)
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SC1454
POWER MANAGEMENT Applications Information
Theory Of Operation The SC1454 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. Furthermore, the SC1454, by combining two ultra low dropout (ULDO) regulators, along with enable PIN Descriptions controls and output voltage adjustability for one output, provides a very space efficient solution for multiple supply requirements. The SC1454 contains two ULDOs, both of which are supplied by one input supply, between IN and GND. Each ULDO has its own active high enable pin (ENA/ENB). Pulling this pin low causes that specific ULDO to enter a very low power shutdown state. The SC1454 contains an internal bandgap reference which is fed into the inverting input of two error amplifiers, one for each output. The output voltage of each regulator is divided down internally using a resistor divider and compared to the bandgap voltage. The error amplifier drives the gate of a low R DS(ON) P-channel MOSFET pass device. Output A has both a fixed and adjustable output voltage mode. Grounding the SETA pin (pulling it below the Sense/ Select threshold of 40mV) will connect the internal resistor divider to the error amplifier resulting with the internally preset output voltage. If SETA is pulled above this threshold, then the Sense/Select switch will connect the SETA pin to the error amplifier. Output A will then be regulated such that the voltage at SETA will equal VSETA, the SETA reference voltage (typically 1.250V). A bypass pin (BYP) is provided to decouple the bandgap reference to reduce output noise (on both outputs) and also to improve power supply rejection. Each regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. The current limit is guaranteed to be greater than 400mA to allow fast charging of the output capacitor and high initial currents for DSP initialization. The SC1454 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker.
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The SC1454 includes thermal shutdown circuitry to turn off the device if T J exceeds 150C (typical), with the device remaining off until TJ drops by 20C (typical). Reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than 1.5mA. Component Selection - General Output capacitor - Semtech recommends a minimum capacitance of 1F at the output with an equivalent series resistance (ESR) of < 1W over temperature. While the SC1454 has been designed to be used with ceramic capacitors, it does not have to be used with ceramic capacitors, allowing the designer a choice. Increasing the bulk capacitance will further reduce output noise and improve the overall transient response. Input capacitor - Semtech recommends the use of a 1F ceramic capacitor at the input. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving overall load transient response. Bypass capacitor - Semtech recommends the use of a 10nF ceramic capacitor to bypass the bandgap reference. Increasing this capacitor to 100nF will further improve power supply rejection. Reducing this capacitor below 1nF may result in output overshoot at turn-on. Component Selection - Externally Setting Output
U1 SC1454CIMS OUTPUT A: 2.5V OUTPUT B: 2.8V R1 100k 1 2 3 4 OUTA OUTB GND SETA IN ENA BYP ENB 8 7 6 5 ENABLE OUTPUT B VIN ENABLE OUTPUT A
R2 100k C1 1uF C2 1uF C3 10nF C4 1uF
Referring to the circuit above, the output voltage of output A can be externally adjusted anywhere within the range from 1.25V to (VIN(MAX) - VD(MAX)). The output voltage will be in accordance with the following equation:
R1 VOUTA = 1.250 * 1 + R2
1% tolerance resistors are recommended. The values of
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SC1454
POWER MANAGEMENT Applications Information (Cont.)
R1 and R2 should be selected such that the current flowing through them is 10A (thus R2 120kW). Thermal Considerations The worst-case power dissipation for this part is given by:
PD(MAX ) = (VIN(MAX ) - VOUTA (MIN ) ) * IOUTA (MAX ) + VIN(MAX ) * IQ(MAX ) + (VIN(MAX ) - VOUTB (MIN ) ) * IOUTB (MAX )
impedance allowable to maintain TJ 125C:
JA (MAX ) = =
(T
J( MAX )
- TA (MAX ) )
(125 - 85)
PD(MAX )
0.334 = 120C / W
(1)
For all practical purposes, equation (1) can be reduced to the following expression:
PD (MAX ) = (VIN (MAX ) - VOUTA (MIN ) ) * IOUTA ( MAX ) + (VIN ( MAX ) - VOUTB ( MIN ) ) * IOUTB (MAX )
This target value can be achieved by using one square inch of board copper connected to the GND pin (pin 3), which connects directly to the device substrate. Increasing this area or the use of multi layer boards will lower the junction temperature and improve overall output voltage accuracy. Layout Considerations While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. 1) Attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCBs where there are internal ground and power planes. 2) Place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour. 3) Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground.
(2)
Looking at a typical application: VIN(MAX) = 4.2V VOUTA = 3V - 2% (worst case) = 2.94V VOUTB = 3.3V - 2% (worst case) = 3.234V IOUTA = IOUTB = 150mA TA = 85C Inserting these values into equation (2) above gives us:
PD(MAX ) = (4.2 - 2.94 ) * 0.15 + (4.2 - 3.234 ) * 0.15 = 0.189 + 0.145 = 0.334 W
Using this figure, we can calculate the maximum thermal
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SC1454
POWER MANAGEMENT Typical Characteristics
Output Voltage vs. Output Current vs. Junction Temperature, VOUT = 2.8V
10.0 7.5 VOUT Deviation (mV) 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TA = 125C TA = 25C TA = -40C VIN = 3.8V VOUT = 2.8V
VOUT Deviation (mV) 10.0 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = 3.8V VOUT = 2.8V Top to bottom: IOUT = 1mA IOUT = 50mA IOUT = 100mA IOUT = 150mA
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 2.8V
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 1.5V
10.0 7.5 5.0 2.5 VOUT (V) 0.0 -2.5 -5.0 -7.5 -10.0 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 150mA IOUT = 1mA VIN = 2.5V VOUT = 1.5V 40 30 20 10 VOUT (V)
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 5.5V
VIN = 6.5V VOUT = 5.5V
IOUT = 1mA 0 -10 -20 IOUT = 150mA -30 -40 -50 -25 0 25 TJ (C) 50 75 100 125
SETA Reference Voltage vs. Junction Temperature vs. Output Current, VIN = 2.5V
1.275 1.270 1.265 1.260 VSET (V) 1.255 1.250 1.245 1.240 1.235 1.230 1.225 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 150mA IOUT = 1mA VIN = 2.5V
SETA Reference Voltage vs. Junction Temperature vs. Output Current, VIN = 6.5V
1.275 1.270 1.265 1.260 VSET (V) 1.255 1.250 1.245 1.240 1.235 1.230 1.225 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 1mA VIN = 6.5V
IOUT = 150mA
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Dropout Voltage vs. Output Current vs. Junction Temperature
200 175 150 125 VD (mV) 100 75 50 25 0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TJ = 125C TJ = 25C TJ = -40C VD (mV) 200 175 IOUT = 150mA 150 125 100 75 50 IOUT = 50mA 25 0 -50 -25 0 25 TJ (C) 50 75 100 125
Dropout Voltage vs. Junction Temperature vs. Output Current
Line Regulation vs. Junction Temperature
10 9 8 7 REG(LINE) (mV) 6 5 4 3 2 1 0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = VOUT + 1V to 5.5V IOUT = 1mA 10 9 VIN = VOUT + 1V to 6.5V REG(LOAD) (mV) 8 7 6 5 4 3 2 1 0 -50 -25
Load Regulation vs. Junction Temperature
VIN = VOUT + 1V IOUT = 0.1mA to 150mA
0
25 TJ (C)
50
75
100
125
Current Limit vs. Junction Temperature vs. Input Voltage
800 750 VIN = 6.5V 700 ILIM (mA) 650 600 550 VIN = 3.8V 500 450 400 -50 -25 0 25 TJ (C) 50 75 100 125 100 50 0 -50 IQ (nA) 300 250 200 150 400 350
Off-State Quiescent Current vs. Junction Temperature
VIN = 6.5V VENA = VENB = 0V
-25
0
25 TJ (C)
50
75
100
125
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Quiescent Current vs. Junction Temperature vs. Output Current
200 VIN = 6.5V 175 150 125 IQ (A) 100 IOUTA or IOUTB = 150mA 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 IQ (A) IOUTA = IOUTB = 150mA 175 150 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 Top to bottom: VIN = 6.5V VIN = 5V VIN = 3.8V 200 IOUTA = IOUTB = 150mA
Quiescent Current vs. Junction Temperature vs. Input Voltage
Enable Input Voltage vs. Junction Temperature vs. Input Voltage
1.6 VIH @ VIN = 6.5V 1.4 1.2 VEN (V) 1.0 0.8 0.6 0.4 -50 -25 0 25 TJ (C) 50 75 100 125 VIH @ VIN = 4V
VTH (mV) 70 60 80
Sense/Select Threshold Voltage vs. Junction Temperature vs. Input Voltage
VIN = 6.5V 50 40 VIN = 3.8V 30
VIL @ VIN = 6.5V
VIL @ VIN = 4V
20 10 0 -50 -25 0 25 TJ (C) 50 75 100 125
Bypass Start-up Rise Time vs. Junction Temperature vs. Input Voltage
2.00 CBYP = 10nF 1.75 1.50 VIN = 3.8V en (nV/Hz) 1.25 tr (ms) 1.00 VIN = 6.5V 0.75 0.50 0.25 0.00 -50 -25 0 25 TJ (C) 50 75 100 125
Output Spectral Noise Density vs. Frequency vs. Bypass Capacitance
10000 VIN = 2.8V VOUT = 1.8V IOUT = 50mA CIN = 1F COUT = 2.2F TA = 25C
CBYP = 10nF 1000
100
CBYP = 100nF
10 1.E+01
1.E+02
1.E+03 f (Hz)
1.E+04
1.E+05
1.E+06
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Output Spectral Noise Density vs. Frequency vs. Output Capacitance
10000
1000 en (nV/Hz) COUT = 2.2F 100 VIN = 2.8V VOUT = 1.8V IOUT = 50mA CIN = 1F CBYP = 10nF TA = 25C 1.E+02 1.E+03 f (Hz) 1.E+04
10
COUT = 10F
1 1.E+01
1.E+05
1.E+06
Evaluation Board Schematic
J1 ENA J4 RIPPLE A 12345 J5 RIPPLE B 12345 JP1 1 2 3 ON J2 ENB JP2 1 2 3 ON J3 VIN
J6 1 2 OUTA J7 1 R2 OUTB 3 C1 C2 R4 2 3 4
OFF OUTA ENABLE U1 SC1454xIMS OUTA OUTB GND SETA JP3 1 2 IQ MON C3 C4 IN ENA BYP ENB 8 7 6 5 R1
OFF OUTB ENABLE
R3
+
C5 220uF
JP4 EXT INT 1 2 3 OUTA SET R5 R6 J8 OUTB LOAD DRV U2 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP5 1 2 3 EN
OFF OUTB LOAD J9 OUTA LOAD DRV
U3 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP6 1 2 3 EN
OFF OUTA LOAD
J10 GND
J11 GND
J12 GND
J13 GND
J14 GND
J15 GND
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SC1454
POWER MANAGEMENT Evaluation Board Gerber Plots
Top Copper
Bottom Copper
Top Assembly
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SC1454
POWER MANAGEMENT Evaluation Board Bill Of Materials
Quantity 2 1 1 1 2 3 2 2 6 5 1 2 1 1 2 1 2 R eference C 1, C 2 C3 C4 C5 J1 , J2 J3 , J6 , J7 J4 , J5 J8 , J9 J1 0 - J1 5 JP 1 , JP 2 , JP 4 - JP 6 JP 3 R1, R3 R2 R4 R5, R6 U1 U2, U3 Part/D escription 2.2F cerami c 10nF cerami c 1F cerami c 220F, 10V Test pi n Test pi n BNC socket Test pi n Test pi n Header, 3 pi n Header, 2 pi n 10kW, 1/10W 250kW, 25T 62kW, 1/10W 150mA load SC 1454xIMS S i 4410 Vendor Murata Vari ous Murata Vari ous Vari ous Vari ous Vari ous Vari ous Vari ous Vari ous Vari ous Vari ous Bourns Vari ous Vari ous Semtech Vi shay 1W, may not be same value Tri mmer potenti ometer Whi te Red VOUT ri pple moni tor Orange Black GRM42-6X7R105K25 N otes GRM42-6X7R225K16
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SC1454
POWER MANAGEMENT Outline Drawing - MSOP-8
Land Pattern - MSOP-8
Contact Information
Semtech Corporation Power Management Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804
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